Amber Huffman

Amber is an Intel Fellow and the director of storage interfaces in the Non-Volatile Memory Solutions Group at Intel Corporation. She leads the development of storage interfaces and works to integrate the resulting technology in Intel products, with a focus on furthering Intel’s non-volatile memory (NVM) business initiatives. A respected authority on storage architecture, she has used her expertise and influence to lead Intel and the storage industry toward the definition and adoption of fast, streamlined, highly power-managed and low-latency storage interfaces. Her leadership role in industry standards efforts includes forming and chairing the NVM Express (NVMe) Workgroup, a consortium of companies working to define a standardized interface for PCI Express-based solid-state drives. Huffman was lead author and editor on the NVMe specification. She continues to lead technical development within NVMe. She chairs the board of directors for the NVMe Workgroup and the Open NAND Flash Interface (ONFI) Workgroup; both groups are coalitions of more than 90 technology companies. She has devoted her career to storage interfaces since joining Intel in 1998. Her early work focused on Serial ATA (SATA) technology, the storage interface standard implemented in most PCs today. She developed prototypes and began leading and writing portions of the standard, earning an Intel Achievement Award for her work. She led the development of the Advanced Host Controller Interface (AHCI), which remains the standard programming interface for SATA today. Subsequently, she led the technical and industry development of ONFI, which standardizes the NAND Flash memory component interface and enables customers to use Flash from various hardware vendors. As with AHCI and NVMe, she served as lead author and editor on the ONFI industry specification. She earned a bachelor’s degree in computer engineering from the University of Michigan and a master’s degree in electrical engineering from Stanford University. She has been granted more than 20 patents in storage architecture and was named an Intel Fellow in 2016.